The present invention relates to a semiconductor test system, more specifically a semiconductor test system for use in testing semiconductor devices including redundant circuits.
In a semiconductor memory, such as DRAM or others, generally, redundant circuits, which remedy defects in the memory cell array, are formed. In such a semiconductor device including such redundant circuits, after the operation test is performed, defective parts are remedied by being replaced with the redundant circuits with a laser repair device or others.
FIG. 5 is a diagrammatic view of the conventional semiconductor test device for use in testing semiconductor memories, etc., which illustrates the constitution thereof.
As illustrated, the conventional semiconductor test device comprises a tester processor 100, a test pattern generating unit 102, a pattern comparator 104, a fail memory 106, a redundant remedy judging unit 108, a driver 110 and a comparator 112.
The tester processor 100 controls the sequence of the entire semiconductor test device.
The test pattern generating unit 102 generates waveforms (test patterns) to be inputted to semiconductor devices to be tested and comprises a pattern generator 114, a timing generator 116 and a waveform shaper 118. The pattern generator 114 generates patterns, based on programmed data. The timing generator 116 generates timing signals for the patterns generated by the pattern generator 114. The waveform shaper 118 generates waveforms (test patterns) to be supplied to semiconductor devices to be tested, based on the timing signals generated by the timing generator 116 and the patterns generated by the pattern generator 114.
The driver 110 inputs a test pattern generated by the waveform shaper 118 of the test pattern generating unit 102 to the semiconductor devices to be tested.
The comparator 112 receives output waveforms outputted by the semiconductor devices to be tested in which the test pattern has been inputted and compares the received output waveform signals with a reference voltage, and selects either of voltage signals of H (High) level and L (Low) level, based on comparison results and outputs the selected voltage signals. The voltage signals outputted by the comparator 112 are supplied to the pattern comparator 104 as output data in terms of the time axis and the level of the output waveforms outputted by the semiconductor device to be tested.
The pattern comparator 104 compares programmed expectation value data with output data from the comparator 112 and judges the output data. Information of the comparison results given by the pattern comparator 104 is supplied to the tester processor 100. The tester processor 100 generates fail information of defective parts of the semiconductor device to be tested, based on the information of the comparison and judgment results given by the pattern comparator 104.
The fail memory 106 stores fail information.
The redundant remedy judging unit 108 judges based on fail information stored in the fail memory 106 whether or not the redundant remedy for replacing defective parts of the semiconductor device to be tested can be made. When the redundant remedy judging unit 108 judges that the redundant remedy can be made, the redundant remedy judging unit 108 generates redundant remedy data to be used in the redundant remedy by a laser repair device or others.
When the redundant remedy judging unit 108 judges that the redundant remedy can be made, the redundant remedy for replacing the defective parts with redundant circuits is made by using a laser repair device or others, based on the redundant remedy data generated by the redundant remedy judging unit 108.
The background arts of the present invention are disclosed in e.g., Japanese published unexamined patent application No. Hei 9-7388 (1997), Japanese published unexamined patent application No. Hei 9-153021 (1997) and Japanese published unexamined patent application No. 2000-285696 (2000).
However, in the test using the conventional semiconductor test device described above, the redundant remedy judging unit of the device is used only in the step of the test before the redundant remedy is made. That is, the redundant remedy judging unit is unnecessary in the steps of the test after the redundant remedy is made.
As exemplified in FIG. 6, in the process of testing with the semiconductor test device, the step of test before the redundant remedy S100, the step of the redundant remedy S102, the step of high-temperature test after the redundant remedy S104 and the step of low-temperature test after the redundant remedy S106 are sequentially performed. In such process of testing semiconductor devices, as described above, the redundant remedy judging unit is used only in the step of test before the redundant remedy S100 but is not used in the step of high-temperature test after the redundant remedy S104 and the step of low-temperature after the redundant remedy S106. Accordingly, the operation of the redundant remedy judging unit is about ⅓ to ½ of the series of the test steps.
As described above, it cannot be said that the redundant remedy judging unit of the test device is effectively used in the test process with the conventional semiconductor test device.
The memory capacity of the fail memory for fail information to be stored in varies with capacities, etc. of semiconductor memories to be tested. Accordingly, a fail memory having a capacity as large as possible must be mounted on the semiconductor test device so that the semiconductor test device can be used widely in testing various semiconductor devices having semiconductor memories of different capacities. This is a cause for increasing the price of the semiconductor test device.
Furthermore, when semiconductor devices which require memory capacities exceeding the maximum capacity of the fail memory which has been used appear because of integration increases, etc., the semiconductor test device so far used for the test cannot be used. In such case, a semiconductor test device which is usable for the new semiconductor devices must be purchased, or a smaller number of the semiconductor devices must be concurrently tested with the test efficiency being sacrificed. Actually, whenever new semiconductor devices thus appear as semiconductor devices make changes, high expenses are frequently burdens.
Accordingly, it is required to form a semiconductor test device or semiconductor test system which is flexibly applicable to large capacities, etc. of semiconductor devices to be tested without burdens of cost increases.